| 1 |
Application of a formal method to take account of Hybrids or Multi Chip Modules manufacturing means during the design. |
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| 2 |
Application of a formal method to take account of capacities to connect the Hybrids or Multi Chip Modules onto the board.
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| 3 |
Previous experience in development of the Hybrids and the Multi Chip Modules with good feedback from operations. |
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| 4 |
Internal interconnection technology(ies) already used in a previous development. |
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| 5 |
Case and substrate technology(ies) already used in a previous development. |
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| 6 |
External interconnection technology(ies) already used in a previous development. |
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| 7 |
Qualification of the line for space application (ESA/CNES) - (class K according to the MIL-PRF 38534F classification, or class I according to JESD93), or equivalent. |
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| 8 |
Qualification of the line for military application - (class H according to the MIL-PRF 38534F classification or class II according to JESD93), or equivalent. |
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| 9 |
Class G, E or D according to the MIL-PRF 38534F classification, or class lower than II according to JESD93, or qualification program internal to the manufacturer. |
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| 10 |
Application of three methods of improving reliability:
- burn-in
- batch by batch DPA
- functional test at the 3 temperatures
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| 11 |
Application of two out of three among:
- burn-in
- batch by batch DPA
- functional test at the 3 temperatures
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| 12 |
Application of one out of three among:
- burn-in
- batch by batch DPA
- functional test at the 3 temperatures
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